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No warranty of accuracy is given concerning the contents of the information contained in this publication. To the extent permitted by law no liability (including liability to any person by reason of negligence) will be accepted by SolidRun Ltd., its subsidiaries or employees for any direct or indirect loss or damage caused by omissions from or inaccuracies in this document. SolidRun Ltd. reserves the right to change details in this publication without prior notice. Product and company names herein may be the trademarks of their respective owners.
Introduction
This document is intended for hardware engineers that are willing to integrate the CN9130 SOM from SolidRun ltd, into their own design.
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The CN9130 SOM is pin and size compatible to the A388 SOM by SolidRun and can be used as an upgrade for the existing ClearFog Base and ClearFog Pro
Overview
CN9130 System On Module is a highly integrated SOM modulק based on Marvell’s CN9130 SoC.
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CN9130 SoC (up to 2.2GHz).
On board 64bit DDR4 bus suppoting up to 16GB at 2400MT/s without ECC
Single 12V or 5V DC-input is required.
Specifications
Features | CN9130 SOM |
Processor Core | 4 cores Arm Cortex A72 |
Processor speed | Up to 2.2GHz |
Memory | On board DDR4: Up to 16GB at 2400MT/s 64bit (no ECC) Default assembly 4GB 2400MT/s |
eMMC | Up to 64GB (assembled 8GB) |
Flash | 64Mbit SPI NOR flash |
SATA 3.0 | 2 |
Ethernet | 1x MDI using 88E1512 PHY 1x 10/5 GbE port + 2x 1/2.5 GbE Ports or 2x 5 GbE Port +1x 1/2.5 GbE Port |
PCIe gen 3.0 | 1 Port x4 + 2 Ports x 1 Total of 3 controllers and up to 6 lanes |
USB 3.0 | 2 x USB 3.0 (Host/Device) |
I2C | 2 |
SMI & XSMI | 2 |
UART | 2 |
PPS/PTP support | ✓ |
SPI bus | ✓ |
RTC support | ✓ |
Power | supports input voltage of 5V to 12V up to 11W full system |
Supported OS | Linux kernel 5.8x Yocto DPDK UEFI KVM/QEMU/Containers NFV Openstack compute node |
Environment | Commercial: 0°C to 70°C Industrial: -40°C to 85°C Humidity (non-condensing): 10% – 90% |
Dimensions | 50mm X 35mm |
Simplified Schematics
CN9130 SOM simplified schematics is intended for the following audience –
Software and firmware engineers that enables them to understand the IO and signal connectivity of the SOM design.
Hardware engineers that are willing to use the SOM and build their own development board. This document completes the CN9130 SOM reference manual from description of signal and implementation wise.
Power Consumption
TBD
CN9130 SOM extensions
The CN9130 has two busses of high performance, low latency and low power Marvell® MoChi interfaces (MCi). Each bus is comprised from 4x high speed differential lanes and a dedicated LVDS clock. Both busses are exposed through the SOM connectors and enables to connect 1 or 2 additional 88F8215 comprising the kits of CN9131 and CN9132 on the carrier board.
SERDES Muxing CN9130 – CP0:
Interface | SERDES Lane0 | SERDES Lane1 | SERDES Lane2 | SERDES Lane3 | SERDES Lane4 | SERDES Lane5 |
10GBASE-R/XFI |
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| ETH_Port0 |
| ETH_Port0 |
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5GBASE-R |
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| ETH_Port0 |
| ETH_Port0 or ETH_Port1 |
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10GBASE-X2 (RXAUI) |
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| ETH_Port0 Lane 0 | ETH_Port0 Lane 1 | ETH_Port0 Lane0 | ETH_Port0 Lane 1 |
1000BASE-X (SGMII) / 2.5GBASE-X (HS-SGMII) | ETH_Port1 | ETH_Port2 | ETH_Port0 | ETH_Port1 | ETH_Port0 or ETH_Port1 | ETH_Port2 |
SATA 3.0 | SATA1 | SATA0 | SATA0 | SATA1 |
| SATA1 |
USB 3.0 HOST |
| USB 3.0 Port0 Host | USB 3.0 Port0 Host | USB 3.0 Port1 Host | USB 3.0 Port1 Host |
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USB 3.0 Device |
| USB 3.0 Port0 Decive |
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| USB 3.0 Port0 Decive |
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PCIe RC/EP | PCIex4 Port0 LANE0 | PCIex4 Port0 LANE1 | PCIex4 Port0 LANE2 | PCIex4 Port0 LANE3 | PCIex1 Port1 | PCIex1 Port2 |
CN9130 SOM default config based on Clearfog Base/Pro | PCIe X1 Port0 | USB Port0 | XFI | SGMII | PCIe Gen3 Port1 | SATA1 |
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SGMII port 0 / HS SGMII port0, RXAUI and XFI/10GBASE
SGMII port 1 and HS SGMII port 1
SGMII port 2 and HS SGMII port 2
CP0 MPP[62:0]
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SOM Header Details
Following are the SOM Connectors J1, J2, J3 pin mapping –
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J1, J2 – DF40C-80DP-0.4V(51), 80
Mating connectors:DF40C-80DS-0.4V(51) – 1.5mm mating height
DF40C(2.0)-80DS-0.4V(51) – 2mm mating height
DF40C(4.0)-80DS-0.4V(51) – 4mm mating height
J3 – DF40C-70DP-0.4V(51), 70
Mating connectors:DF40C-70DS-0.4V(51) – 1.5mm mating height
DF40C(2.0)-70DS-0.4V(51) – 2mm mating height
DF40C(4.0)-70DS-0.4V(51) – 4mm mating height
Connector J1
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Connector J2
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Connector J3
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Documentation
CN9130 SOM Simplified Schematics Files
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CN9130 SOM Simplified Schematics 2.98 MB 1 file(s)
CN9130 SOM Mechanical Files
CN9130 SOM Mechanical Files 16.01 MB 1 file(s)
CN9130 SOM Other Files
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ClearFog CN9130 Pro Block Diagram 163.40 KB 1 file(s)
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