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The guide will give a technical overview about the product and by the end of it you should be able to boot an operating system and begin testing your application.

Revision and Notes

Date

Owner

Revision

Notes

1.0

Table of Contents

Table of Contents
minLevel1
maxLevel7

Hardware Setup

Product Specifications

ClearFog CX LX2

HoneyComb LX2

I/Os

3 x USB 3.0
3 x USB 2.0

3 x USB 3.0
3 x USB 2.0

Networking

1 x QSFP port 100GbE
4 x SFP+ ports (10GbE each)
1 x 1GbE copper (RJ45)

4 x SFP+ ports (10GbE each)
1 x 1GbE copper (RJ45)

Processor

NXP Layerscape LX2160A 16-core Arm Cortex A72 up to 2GHz

NXP Layerscape LX2160A 16-core Arm Cortex A72 up to 2GHz

Memory & Storage

Up to 64GB DDR4 DIMM
64GB eMMC
MicroSD
4 x SATA 3.0

Up to 64GB DDR4 DIMM
64GB eMMC
MicroSD
4 x SATA 3.0

Misc.

USB to STM32 for remote management

USB to STM32 for remote management

Development and Debug interfaces

Micro USB
JTAG

Micro USB
JTAG

Power

ATX standard

ATX standard

Expansion card I/Os

1 x PCIe x8 Gen 3.0, open slot (can support x16)
1 x M.2

1 x PCIe x8 Gen 3.0, open slot (can support x16)
1 x M.2

Temperature

Commercial: 0°C to 70°C

Commercial: 0°C to 70°C

Dimensions

PCBA: 170 x 170mm

PCBA: 170 x 170mm

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  • See list of tested LX2160A COM Tested SO-DIMM Memory modules.

  • The difference between the two versions is that HoneyComb does not have a QSFP interface

  • Serdes-1 lanes 0..3 are routed to the QSFP28 connector via TI retimers

  • Serdes-1 lanes 4..7 are directly connected to the 4xSFP+ ports

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Before powering up the board for the first time it is recommended to select the boot media. In order to configure the boot media, please refer to the following DIP switch:

Boot media

Switch 1

Switch 2

Switch 3

Switch 4

Switch 5

SD

OFF

ON

ON

ON

X

eMMC

OFF

ON

ON

OFF

X

SPI

OFF

OFF

OFF

OFF

X


The following shows how to set the switches on the boot source selector:

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The switches on the boot source SW1 selector must be set as follows:

Switch 1

Switch 2

Switch 3

Switch 4

Switch 5

OFF

ON

ON

ON

X


The following shows how to set the switches on the boot source selector:

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Download a pre-built snapshot image from SolidRun Images

Those images are built with the suffix of the commit ID of organised by branch, build-date and commit id from the GitHub - SolidRun/lx2160a_build  project that you can clone and build by yourself.

Please note

The prebuilt images are configured for SO-DIMM DDR4 with speed of 3200, 2900, 2600 and 2400 Mtps (with or without ECC support),. Images that have the prefix lx2160ainfix _xspi_ are intended to be flashed into SPI and recommended for later use after being booted booting another image from micro SD

You can build your own image using the script in here – GitHub - SolidRun/lx2160a_build

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Use the following commands for writing the image to an SD card:

Code Block
xz -dc lx2160acex7_2000_700lx2160a_....img.xz | dd of=/dev/sdX bs=4k4M conv=fdatasyncfsync

Note: Plug a micro SD into your Linux PC, the following assumes that the micro SD is added as /dev/sdX and all it’s partitions are unmounted.

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Please insert the micro USB into your device, then you can refer to Serial Connection for installing necessary serial connection software in Linux/Windows.

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Code Block
load mmc 0:1 0xa4000000 ubuntu-core.img
mmc dev 1
mmc write 0xa4000000 0 0xd2000

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Note

Please Note:

The above commands should be run only once (in the fist boot).

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For some SFP modules that work on SolidRun networking hardware platforms, please refer to SFP Modules .

Using the built-in NICs

In case of SERDES configuration of 8 18 (default build) then dpmac.3 to dpmac.10 can be exposed. Those are 8x10Gbps 8x10 interfaces where first 4 dpmac.3 to dpmac.6 can be obtained by using a 40G to 4x10G splitter cable (or are exposed on QSFP connector, the remaining dpmac.7 to dpmac.10 are on the 2x2 SFP+ connector cage.

The 4 ports on QSFP can be accessed via 40G to 4x10G or 100G to 4x25G splitter cables (so called octopus cable) when connected to HoneyComb / ClearFog CX QSFP28 port and dpmac.7 to dpmac.10 are on the 2×2 SFP+ connector cage., for 25Gbps speed Linux device-tree needs to be changed.

The SFP+ ports are designed for 10G. They can still support 25G with active modules (i.e. fiber or RJ45) however with some risk of noise between connector and CPU.

Ports are activated using NXP’s “restool” package. For example – dpmac.9 is the SFP+ port on the upper row and left towards PCB edge –

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