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Revisions and Notes
Date | Owner | Revision | Notes | ||||||||
Noam Weidenfeld | 1.0 | ||||||||||
Table of Contents |
| ||||||||||
| Info |
|---|
No warranty of accuracy is given concerning the contents of the information contained in this publication. To the extent permitted by law no liability (including liability to any person by reason of negligence) will be accepted by SolidRun Ltd., its subsidiaries or employees for any direct or indirect loss or damage caused by omissions from or inaccuracies in this document. SolidRun Ltd. reserves the right to change details in this publication without prior notice. Product and company names herein may be the trademarks of their respective owners. |
Introduction
This User Manual relates to the SolidRun IMX8 DXL series, which includes.
Dual core ARM A35 (1.2GHz) w Cortex-M4 (266 MHz).
Single core ARM A35 (1.2GHz) w Cortex-M4 (266 MHz).
Overview
The SolidRun’s SR-SOM-MX8 family is a high-performance micro system on module (S.O.M.) based on the highly integrated Freescale i.MX8M family of products including the IMX8M, IMX8M-Mini, IMX8M-Plus and IMX8 DXL.
The IMX8 DXL is targeting the Automotive After-Market.
Highlighted Features
Ultra-small footprint SOM (50x35mm) including two board-to-board connectors (160 total pins number).
Freescale i.MX8 DXL SoC supports Solo and DUAL Lite versions.
Up to Dual Cortex A35 and up to 1.2GHz
Cortex-M4 subsystem processor supports real time tasks.
High security engines and Tamper detection.
A single Ethernet interface (RGMII).
Two USB 2.0 (OTG) interfaces.
Up to three CAN interfaces.
A single PCIe 3.0 interface.
High industrial reliability with in-line ECC on LPDDR and on on-chip RAM.
LPDDR4 memory in x16 configurations supports up to 4GB and up to 2.4GT/s.
Up to 64GB eMMC.
SAF5400 DSRC modem/dual antenna (u.FL) and AFE supporting the V2X application.
SFX1800 security element for the V2X applications.
MIA-M10Q GPS (u.FL) module supporting all protocols.
3D accelerometer and 3D gyroscope, Barometer and Magnetometer sensors support.
Power management devices
Automotive temperature grade support.
Supporting Products
The following products are provided from SolidRun both as production level platforms and as reference examples on how to incorporate the SOM in different levels of integration:
HummingBoard V2X– A board computer that incorporates the SOM retains the same Android and different Linux distributions while adding extra hardware functionalities and access to the hardware.
Description
Block Diagram
The following figure describes the IMX8 DXL Blocks Diagram.
...
Features Summary
Following is the features summary of the SOM. Notice that some of the features are pinout multiplexed (please refer to the pin mux table below and the Freescale i.MX8-XLite data sheets):
Ultra-small footprint SOM (50x35mm) including two board-to-board connectors (160 total pins number).
Freescale i.MX8 DXL SoC supports Solo and DUAL Lite versions.
Up to Dual Cortex A35 and up to 1.2GHz
Cortex-M4 subsystem processor supports real time tasks.
High security engines and Tamper detection.
A single Ethernet interface (RGMII).
Two USB 2.0 (OTG) interfaces.
Up to three CAN interfaces.
A single PCIe 3.0 interface.
High industrial reliability with in-line ECC on LPDDR and on on-chip RAM.
LPDDR4 memory in x16 configurations supports up to 4GB and up to 2.4GT/s.
Up to 64GB eMMC.
SAF5400 DSRC modem/dual antenna (u.FL) and AFE supporting the V2X application.
SFX1800 security element for the V2X applications.
MIA-M10Q GPS (u.FL) module supporting all protocols.
3D accelerometer and 3D gyroscope, Barometer and Magnetometer sensors support.
Power management devices
Automotive temperature grade support.
Core System Components
i.MX8-XLite SoC Family
The IMX8 XLite family of processors includes the i.MX 8DualXLite and i.MX 8SoloXLite. These devices target the automotive and industrial market segments.
...
The following figure describes the CPU block diagram.
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Memories
The IMX8-XLite SOM supports varieties of memory interfaces for booting and data storage. The following figure describes the IMX-8 SOM memory interfaces.
LPDDR4
Up to 4GB memory space.
16 Bits data bus.
Up to 2400 MT/s.
Inline ECC.
eMMC NAND Flash
Up to 64GB memory space.
8 Bits data bus.
Support MMC standard, up to version 5.1.
uSDHC-0.
Can be used as BOOT NVM
Quad Serial NOR Flash (Carrier)
Can be configured as 1/2/4-bit operation.
Support both SDR mode and DDR mode
No reset
QSPIA/nSS0.
Can be used as BOOT NVM.
EEPROM (SOM)
1Kb EEPROM
ON-Semi’s CAT24AA01TDI or compatible
I2C2
Address 0X50 (7 bits format)
Stores SOM’s configurations.
Micro-SD (Not Supported)
V2X Modem (SDR)
The SOM support One-chip V2X transceiver and baseband, with dual antenna
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For more details check the MIA-M10Q datasheet:
Sensors
The IMX8-XLite SOM integrates three MEM sensors. The figure below describes the sensors integration.
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For more information see: IIS2MDC - High accuracy, ultra-low-power ,3-axis digital output magnetometer - STMicroelectronics
IMX8-XLite External Interfaces
General
The SOM integrates three Hirose DF40 board-to-board headers.
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Miniature (0.4m pitch)
Highly reliable manufacturer
Availability (worldwide distribution channels)
Excellent signal integrity (supports 6Gbps)
Please contact Hirose or SolidRun for reliability and test result data.
Supported Interfaces
PCIe
The IMX8-XLite SOM supports a single PCIe interfaces. The following figure describes the PCIe interfaces.
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For more details se the CPU datasheet. i.MX 8XLite Applications Processors for Telematics, V2X and Industrial Control | NXP Semiconductors
USB-2
The IMX8-XLite supports two USB interfaces. The following figure describes the USB interfaces.
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Note – The voltage on VBUS can support 5V.
RGMI
The IMX8-XLite supports an RGMII interface connected to the BtB connectors. The following figure describes the RGMII interface.
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For more details see the CPU datasheet. i.MX 8XLite Applications Processors for Telematics, V2X and Industrial Control | NXP Semiconductors
FlexCAN
The IMX8-XLite supports up to three FlexCAN interfaces. Main features are:
...
i.MX 8XLite Applications Processors for Telematics, V2X and Industrial Control | NXP Semiconductors
FlexSPI
Single Quad SPI/Octal SPI.
Single, dual, quad, and octal mode of operation.
Support for flash data strobe signal for data sampling in DDR and SDR mode.
i.MX 8XLite Applications Processors for Telematics, V2X and Industrial Control | NXP Semiconductors
LPSPI
Two SPI interfaces.
Can be configured either as a master or slave.
Supports DMA accesses and generates DMA requests.
Ultra Secured Digital Host Controller (uSDHC)
Single 4-bits interface.
Provides the interface between the host system and the eMMC, SD card, and SDIO.
Compatible with the eMMC System Specification version 4.2/4.3/4.4/4.41/5.0/5.1.
Compatible with the SD Memory Card Specification version 3.0 and supports the Extended Capacity SD Memory Card.
Compatible with the SDIO Specification version 2.0/3.0.
Card bus clock frequency up to 104 MHz.
For more details see the CPU datasheet. i.MX 8XLite Applications Processors for Telematics, V2X and Industrial Control | NXP Semiconductors
B2B Connector’s Signal Description
J13
J13 | J9 | |||
PIN | SOM | Carrier | ||
2 | PCIE_CTRL_CLKREQ_B (GPIO4_IO01, GPIO07_IO01) | 3V3 | EXT. (J21-48) | |
4 | PCIE_CTRL_WAKE_B (GPIO4_IO02, GPIO07_IO02) | 3V3 | EXT. (J21-50) | |
6 | GND | GND | ||
8 | PCIE_CTRL_PERST_B (GPIO4_IO00, GPIO07_IO00) | 3V3 | EXT. (J21-52) | |
10 | SPI3_CS1 | 1V8 | NC | |
12 | SPI3_SCK (GPIO0_IO13) | 1V8 | BT_REG_ON (WI-FI Module) | 1V8 |
14 | SPI3_SDO (GPIO0_IO14) | 1V8 | RF_PWR (Cellular Power) | 1V8 |
16 | SPI3_SDI (GPIO0_IO15) | 1V8 | WL_REG_ON (WI-FI Module) | |
18 | NC | NC | ||
20 | (GPIO2_IO08_IN, GPIO6_IO022_IN) | 3V3 | DEV_CFG_N (SJA1110AEL) | 3V3 |
22 | NC | 1V8 | NC | |
24 | M40_UART0_TX (GPIO1_IO11, M40_GPIO0_IO03) | 1V8 | RESET_N (LTE-EG25) | 1V8 |
26 | M40_UART0_RX (GPIO1_IO12, M40_GPIO0_IO02) | 1V8 | PWRKEY (LTE-EG25) | 1V8 |
28 | BB_USDHC2_CLK (GPIO4_IO29) | 1V8 | BB_USDHC2_CLK (WI-FI Module) | 1V8 |
30 | BB_USDHC2_DAT3 (GPIO5_IO02) | 1V8 | BB_USDHC2_DAT3 (WI-FI Module) | 1V8 |
32 | BB_USDHC2_DAT2 (GPIO5_IO01) | 1V8 | BB_USDHC2_DAT2 (WI-FI Module) | 1V8 |
34 | BB_USDHC2_DAT1 (GPIO5_IO00) | 1V8 | BB_USDHC2_DAT1 (WI-FI Module) | 1V8 |
36 | BB_USDHC2_DAT0 (GPIO4_IO31) | 1V8 | BB_USDHC2_DAT0 (WI-FI Module) | 1V8 |
38 | BB_USDHC2_CMD (GPIO4_IO30) | 1V8 | BB_USDHC2_CMD (WI-FI Module) | 1V8 |
40 | NC | NC | ||
42 | GND | 3V3(PU) | ||
44 | ENET_PHY_MDIO (GPIO5_IO10, GPIO07_IO16) | 3V3(PU) | ENET_PHY_MDIO (SJA1110AEL) | 3V3 |
46 | ENET_PHY_MDC (GPIO5_IO11, GPIO07_IO17) | 3V3 | ENET_PHY_MDC (SJA1110AEL) | 3V3 |
48 | GND | GND | ||
50 | NC | NC | ||
52 | TERMINAL_UART0_TX | 3V3 | TERMINAL_UART0_TX | 3V3 |
54 | TERMINAL_UART0_RX | 3V3 | TERMINAL_UART0_RX | 3V3 |
56 | NC | NC | ||
58 | GND | GND | ||
60 | SCU_UART0_TX (SCU_GPIO0_IO01) | 1V8 | NC | |
62 | SCU_UART0_RX (SCU_GPIO0_IO00, GPIO2_IO03) | 1V8 | NC | |
64 | GND | GND | ||
66 | MCLK_IN0 (GPIO0_IO19) | 1V8 | PTP_CLK (SJA1110AEL) | |
68 | MCLK_IN1 | 1V8 | NC | |
70 | GND | GND | ||
72 | UART1_RX (GPIO0_IO22) | 1V8 | UART1_RX (WI-FI Module) (J21-40) | 1V8 |
74 | UART1_TX (GPIO0_IO21) | 1V8 | UART1_TX (WI-FI Module) (J21-42) | 1V8 |
76 | GND | GND | ||
78 | UART1_CTS_B (GPIO0_IO24) | 1V8 | UART1_CTS_B (WI-FI Module) (J21-46) | 1V8 |
80 | UART1_RTS_B | 1V8 | UART1_RTS_B (WI-FI Module) (J21-44) | 1V8 |
J14
J14 | J16 | |||
PIN | SOM | Carrier | ||
2 | GND | GND | ||
4 | NC | NC | ||
6 | NC | NC | ||
8 | GND | GND | ||
10 | USB_OTG1_PWR (GPIO4_IO03, GPIO07_IO03) | 3V3 | SW_RSTn (SJA1110AEL) | 3V3 |
12 | USB_OTG2_PWR (GPIO4_IO04, GPIO07_IO04) | 3V3 | SW_CORE_RSTn (SJA1110AEL) | 3V3 |
14 | GND | GND | ||
16 | USB_OTG1_DP | USB_OTG1_DP (J26-6) | ||
18 | USB_OTG1_DN | USB_OTG1_DN (J26-5) | ||
20 | GND | GND | ||
22 | USB_OTG2_DP | USB_OTG2_DP (LTE-EG25) | ||
24 | USB_OTG2_DN | USB_OTG2_DN (LTE-EG25) | ||
26 | GND | GND | ||
28 | USB_OTG2_OC (GPIO4_IO06, GPIO07_IO06) | 3V3 | INT_N (SJA1110AEL) | 3V3 |
30 | USB_OTG1_OC (GPIO4_IO05, GPIO07_IO05) | 3V3 | SW_PE (SJA1110AEL's Power Enable) | 3V3 |
32 | SPI0_CS0 (GPIO1_IO08,M40_GPIO00_IO03) | 3V3 | SPI0_CS0 (SJA1110AEL) | 3V3 |
34 | SPI0_CS1 (GPIO1_IO07) | 3V3 | SPI0_CS1 (SJA1110AEL) | 3V3 |
36 | GND | GND | ||
38 | ENET1_RGMII_TXC (GPIO0_IO00) | 3V3 | ENET1_RGMII_TXC (SJA1110AEL) | 3V3 |
40 | ENET1_RGMII_TX_CTL (GPIO0_IO02) | 3V3 | ENET1_RGMII_TX_CTL (SJA1110AEL) | 3V3 |
42 | ENET1_RGMII_TXD0 (GPIO0_IO08, GPIO06_IO02) | 3V3 | ENET1_RGMII_TXD0 (SJA1110AEL) | 3V3 |
44 | ENET1_RGMII_TXD1 (GPIO0_IO09, GPIO06_IO03) | 3V3 | ENET1_RGMII_TXD1 (SJA1110AEL) | 3V3 |
46 | ENET1_RGMII_TXD2 (GPIO0_IO01) | 3V3 | ENET1_RGMII_TXD2 (SJA1110AEL) | 3V3 |
48 | ENET1_RGMII_TXD3 (GPIO0_IO03) | 3V3 | ENET1_RGMII_TXD3 (SJA1110AEL) | 3V3 |
50 | NC | NC | ||
52 | OTG2_VBUS | 5V | USB_5V | 5V |
54 | NC | NC | ||
56 | V_BCKP | 3V3 | NC | 3V3 |
58 | ENET1_RGMII_RXC (GPIO0_IO04) | 3V3 | ENET1_RGMII_RXC (SJA1110AEL) | 3V3 |
60 | ENET1_RGMII_RX_CTL (GPIO0_IO11, GPIO06_IO05) | 3V3 | ENET1_RGMII_RX_CTL (SJA1110AEL) | 3V3 |
62 | ENET1_RGMII_RXD0 (GPIO0_IO10, GPIO06_IO04) | 3V3 | ENET1_RGMII_RXD0 (SJA1110AEL) | 3V3 |
64 | ENET1_RGMII_RXD1 (GPIO0_IO07, GPIO06_IO01) | 3V3 | ENET1_RGMII_RXD1 (SJA1110AEL) | 3V3 |
66 | ENET1_RGMII_RXD2 (GPIO0_IO06, GPIO06_IO00) | 3V3 | ENET1_RGMII_RXD2 (SJA1110AEL) | 3V3 |
68 | ENET1_RGMII_RXD3 (GPIO0_IO05) | 3V3 | ENET1_RGMII_RXD3 (SJA1110AEL) | 3V3 |
70 | GND | GND | ||
72 | GND | GND | ||
74 | GND | GND | ||
76 | GND | GND | ||
78 | GND | GND | ||
80 | GND | GND |
Power and Reset
Power Architecture
The IMX8-XLite power is a single 5V source. It uses NXP’s PMIC to source all the SOM's power rails and a 3.3V Buck to generate the 3.3V. The following figure describes the power architecture.
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Single 5V power source.
NXP’s PF7100.
TI’s TPSM82822 generates the 3.3V/2A.
3.3V output up to 0.5A (Need to calculate system and SOM power).
1.8V output (Buck3) up to 1A (Need to calculate system and SOM power).
Power up sequence is supported by the PMIC configuration.
Reset
The reset signal is generated by the PMIC after all power are “ON” and a manual reset button.
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IMX8-XLite Integration Manual
Booting Options
The following table describes the booting options:
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All boot signals are available on the Board-to-Board connectors.
I2C Interfaces
The IMX8-XLite SOM uses I2C2 and I2C3 interfaces for its internal configurations.
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The PMIC has a dedicated I2C interface
GPIO Interfaces
The IMX8-XLite uses some GPIO signals for its internal controls. The following table describes the GPIO allocation.
Signal | I/O | Description | Remarks |
SAF5400_RST | GPIO1.IO[10] | Reset the V2X modem | Active Low |
SAF_BOOT0 | GPIO1.IO[09] | Set the V2X modem boot option | “0” QSPI “1” SDIO |
GPS_RSTN | GPIO2.IO[08] | Reset the GPS | Input |
GPS_INT | GPIO2.IO[09] | GPS Interrupt | Active Low |
6AX_INT | GPIO2.IO[11] | 3D accelerometer and 3D gyroscope Interrupt | Active Low |
MAG_INT | GPIO2.IO[10] | Enable the WLAN | Active High |
IMX8-XLite SOM Debugging Capability
The IMX8-XLite SOM supports two main debugging interfaces:
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JTAG interface is on the IMX8-XLite SOM and is exposed as test pins on print side. Following is a snapshot of the test points and its connectivity traces:
Mechanical Description
Following is a diagram of the TOP VIEW of the IMX8-XLite SOM.
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For more information and carrier design instruction contact SolidRun Support.
Ordering Information
Please refer to the SolidRun website for more information regarding part numbers and the procedure for placing an order. www.solid-run.com
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